Digital Verification Engineer
Challenges are our drive, innovation our calling. We at Kandou are a team of passionate accomplished professionals making a mark in the semiconductor industry. We're an innovative leader in high-speed and energy efficient chip-chip link solutions critical to the evolution of the electronics industry, continuously developing to meet the demands of not just the customers of today, but of tomorrow too. If you love to be part of a high-tech scale-up and are motivated by pushing your limits and challenging the status quo, we have an opportunity for you.We are actively seeking a DigitalVerification Engineer, based in either UK (Northampton).
Switzerland (Lausanne) or Germany (Dortmund)-Key responsibilities
- Work with Design Engineers in verification and validation of circuit designs
- Prepare design verification plan based on design specifications
- Plan and schedule assigned projects for timely completion
- Utilize latest techniques, tools and technologies for design verification activities
- Maintain design verification environment, track and close design bugs
- Develop design verification methodologies and implement standard debug flows
- Participate in design reviews
Your profile
- Minimum 5+ years’ experience in the semiconductor industry.
- Expert in digital design verification, using standardized methodologies, i.e. UVM
- Experience in simulating mixed signal designs with real-number Verilog behavioural models is highly desirable
- Familiarity with SerDes is highly desirable
- Experience with SystemVerilog Assertions (SVA) and formal verification is valuable
- Experience in constrained random testbench development
- Proven track record in verifying complex designs (preferably in high volume ASIC applications)
- Experience with 3rd party VIP usage is an added bonus
- Familiarity with high level protocols (e.g. PCIe, USB, DP) is an added bonus
- Bachelor of Engineering in Electronics and Electrical Engineer (equivalent or higher)
Competencies
- Very good knowledge on Metric driven verification including test planning and coverage closure
- Very good knowledge on simulation tools and debugging techniques
- Knowledge of Cadence simulation tools is an added bonus
- Good scripting techniques, regression setup and regression management
- Good understanding of simulation and verification environments
- Skilled in trade-offs between quality and schedule
- Excellent team player with great communication skills, proactive and self-reliant
- Be rigorous and have an analytical mind
If this is the role you have been looking for and you want to be part of a growing Company, with an exciting future then we would really love to hear from you. Together We Kandou It
