Challenges are our drive, innovation our calling. We at Kandou are a team of passionate accomplished professionals making a mark in the semiconductor industry. We're an innovative leader in high-speed and energy efficient chip-chip link solutions critical to the evolution of the electronics industry, continuously developing to meet the demands of not just the customers of today, but of tomorrow too. If you love to be part of a high-tech scale-up and are motivated by pushing your limits and challenging the status quo, we have an opportunity for you.
We are actively seeking a resourceful Analog Layout Manager, based in either UK (Reading) or Lausanne, Switzerland.Responsibility
- Manage a diverse, multi-site analog layout team – responsibility for hiring, resourcing, scheduling, upskilling, mentoring, performance reviews, reporting and engineering execution
- Work closely with architecture, analog design, digital design, and verification teams to identify design gaps, design flows gaps and implement improvement actions, i.e., ensure delivery of high-quality designs
- Support IP and chip level integration, coordinate with other teams on deliverables and schedule for IPs
- Custom layout and verification of analog circuits, cells, blocks and IP for multi-Gigabit high speed chip to chip communication links (SerDes up to and beyond 28Gb/s and/or memory IO) in advanced semiconductor technology nodes
- Interact closely with the analog design team to understand requirements and implement solutions
- Continuous improvement of layout methodologies to meet ever increasing demand of quality and efficiency
- Be the voice of the analog layout team. Manage workload and schedules, report to internal management team and external customers
Experience
- Experience in custom analog layout of circuits and blocks for multi-Gigabit serial data-link transceivers
- Expertise in layout of high-speed/frequency circuits such as amplifiers, oscillators, phase-locked loops, delay-locked loops, and other fundamental building blocks such as biasing, buffers, regulators, filters, data converters
- Understanding of layout approaches and techniques for high-speed circuits, matching constraints, minimization of parasitics, power grids and ESD requirements
- Ideally, experience on modern semiconductor process technologies including 16nm, 7nm & 5nm
- User of EDA tools for design and verification such as Cadence Virtuoso, Calibre DRC/LVS, QRC
- Understanding of parasitic extraction and modelling, Electro migration, IR drop, ESD and related concepts
- Knowledge of Product Development Life Cycle and representing the analog layout discipline at project gate exits and final sign-off, inc. tape-out
- Skilled in managing a technical team in delivering quality designs to schedule
- Experience in leading and working with teams across different geographical sites
- Project management experience would be beneficial
Skills
- Organisational skills to manage team workload and report to internal management team
- Strong communicator and team leader
- Self-motivated with the ability to lead and develop a team
- Empathy and listening
- Self-management
Education
- Bachelor Eng or equivalent (or higher) degree in Electrical Engineering / Microelectronics
If this is the role you have been looking for and you want to be part of a growing Company, with an exciting future then we would really love to hear from you. Together We Kandou It!
